1. Field of the Invention
The present invention relates to a table on which a substrate to be subjected to plasma processing, such as a semiconductor wafer, is placed, and to a plasma processing system comprising the table.
2. Background Art
The process of semiconductor device production includes many processing steps in which a process gas is made into plasma and this plasma is used to process a substrate, such as dry etching and ashing. Of the plasma processing systems in which plasmas are used to process substrates, a processing system of the following type is often used: a pair of parallel plate electrodes are placed in a processing system with one of them positioned above the other; RF (radio frequency) power is applied to the space between the two electrodes to make a process gas fed to the system into plasma; and a substrate to be processed, such as a semiconductor wafer (hereinafter referred to as a wafer), placed on the lower electrode, is processed with the plasma.
In the plasma processing, processing that demands “low-energy, high-density plasmas”, i.e., plasmas having low ion energy and high electron densities, has increased in recent years. There is therefore a case where the frequency of RF power to be used to produce plasmas is extremely high, e.g., 100 MHz, as compared with that of RF power conventionally used, e.g., over 10 MHz. However, when the frequency of the electric power to be applied is increased, the field strength tends to become higher in the center of the electrode surface, i.e., in the region corresponding to the center of a wafer, and to become lower in the region around it. When the field strength distribution becomes non-uniform in this way, the plasma produced also becomes non-uniform in electron density, so that the rate of processing, etc. vary depending on the position on a wafer surface. This has been a cause of the problem that a wafer processed with plasma, excellent in within-wafer uniformity, cannot be obtained.
In order to overcome such a problem, Japanese Laid-Open Patent Publication No. 2004-363552, paragraphs 84 and 85 on page 15, proposes a plasma processing system in which a dielectric having a relative dielectric constant of about 3.5 to 8.5, such as a ceramic material, is embedded in the center of one of the facing surfaces of two parallel plate electrodes in order to obtain a uniform field strength distribution, thereby obtaining a wafer processed with plasma, improved in within-wafer uniformity.
The embedment of such a dielectric in an electrode will now be described with reference to FIG. 3(b). A high-frequency current that has propagated along the face of an electrically conductive member 21, serving as a lower electrode, from below it and reached above the member 21 flows along the wafer W surface toward the center of the wafer W, but part of this current leaks to the electrostatic chuck 23 side, passes through a dielectric 24 constituting the electrostatic chuck 23, and flows along the interface between the dielectric 24 and the electrically conductive member 21 (the surface of the electrically conductive member 21) to the outside. In the part in which the dielectric 22 useful for making plasma uniform is embedded, the high-frequency current can flow deeper than in the other part and causes cavity cylindrical resonance of TM mode. Consequently, the electric field in the center, which will be applied to the plasma from the wafer W surface, can be decreased, and the electric field within the wafer W plane becomes uniform. This discussion is made on the premise that the specific resistance of an electrode film 25 for the electrostatic chuck is high.
However, the high-frequency current that has propagated along the face of the electrically conductive member 21 from below it and reached above the member 21, and the high-frequency current returned to the edge of the wafer W from below the dielectric 24 of the electrostatic chuck 23 and from below the dielectric 22 embedded in the electrically conductive member 21 in order to create plasma uniformly partly leak to the outside of the wafer W. For this reason, the electric potential of the plasma existing above the edge of the wafer W becomes low, and the rate of etching the wafer W thus becomes lower at the edge than in the center. Because of such non-uniformity in etching rate, the etched wafer W has been poor in within-wafer uniformity.